Design of 4-2 compressor with 2's complement capability
Abstract
Compressors are widely used in realization of multi-operand addition as well as the reduction of multiplication tree. One of the major properties of 4-2 compressor is compression degree of two. 4-2 compressors are used in order to design and implement larger compressors such as 6-2, 9-2 and IEEE 754 standard (27-2 compressor). The inconvenient of conventional 4-2 compressor is the incapability of handling the signed numbers. In this paper a new technique for addition is proposed. Using this method and current mode multiple valued logic we propose a new circuit. It enjoys the 2's complement property and preserves the conventional 4-2 compressor reduction degree. This design is simpler to realize. The propagation delay in the best and worst cases is exactly the same. The number of transistor used is reduced which results in a reduction of power dissipation and chip area. The related circuits are simulated with HSPICE using 0.25 μ m technology. The simulation results confirm what we have clamed.
Keywords
4-2 Compressor, 2’s Complement Property, Current Mode, Multiple Valued Logic
