Implementation of Efficient Modulo 2n+1 Squarer for {2n-1, 2n, 2n+1} Based Residue Number System
Abstract
In order to design special-purpose digital signal processing, modulo 2^n+1 squarer is the core element that is widely employed in algorithms. Among the 3n dynamic ranges, the {2^n-1, 2^n, 2^n+1} moduli set has received significant attention in residue number systems. Since modulo 2^n+1 is the most critical one, in this paper we present a novel architecture of modulo 2^n+1 squarer for weighted binary representation. Experimental results show power, delay and area improvements compared to the latest 2^n+1 squarer architectures.
Keywords
Modulo Squarer, Multiplier, Residue Arithmetic, Residue Number System
