From Fault Tolerance to Fault Attack Tolerance in the Implementations of Advanced Encryption Standard

From Fault Tolerance to Fault Attack Tolerance in the Implementations of Advanced Encryption Standard

Abstract

Fault attack techniques are powerful and efficient cryptanalysis methods to find the secret key of cryptographic devices. Thus, several methods have been introduced to offset this type of side channel attack. On the other hand, some techniques were presented to locate and detect faults in the implementations of symmetric and asymmetric encryption/decryption algorithms. To our best knowledge, this paper is the first article which examines the effectiveness of fault tolerance techniques to prevent fault attacks. Also, we introduce a minimum time redundant method of using the inverse modules for Concurrent Error Detection (CED). The usage of Error Correction Codes (ECC) in implementations of Advanced Encryption Standard (AES) is another approach that is proposed in this article. We present the comparison between the usage of the proposed ECCs to make fault tolerant implementation and to resist it against fault attacks. Experimental results of one of the proposed ECCs show that almost all possible faults are detected, while some of them are corrected. Thus, it resists against approximately all injected faults to attack on the implementation of AES algorithm.

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