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A Fast Hardware Implementation of STON Algorithm for Comparing 3-D Structure of Proteins in FPGA
Somayeh Kashi • Morteza Saheb Zamani
Keywords: Bioinformatics • Protein Structure Comparison • STON Algorithm • Hardware Acceleration • FPGA
Efficient Buffer Resource Distribution by Buffer Planning in Floorplanning Level to Improve Buffer Usage and Routing Congestion
Ali Jahanian • Morteza Saheb Zamani
Keywords: Buffer Planning • Buffer Insertion • Planning
A Reconfigurable Architecture for Implementing Multiple Cipher Algorithms
Ali Valizadeh • Morteza Saheb Zamani • Babak Sadeghiyan • Farhad Mehdipour
Keywords: Reconfigurable Hardware • FPGA • Cryptography
A Similarity-Based Framework for Integrated Temporal Partitioning and Physical Design of Reconfigurable Computing Systems
Farhad Mehdipour • Morteza Saheb Zamani • Hamid Reza Ahmadifar • Mehdi Sedighi
Keywords: reconfigurable computing systems • design flow • temporal partitioning • physical design • placement • routing • dummy node
A Specification-Driven Framework for the Floorplanning and Placement of Hierarchical VLSI Designs
Morteza Saheb Zamani
Keywords: VLSI • physical design • floorplanning • placement • specification hierarchy
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