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Novel Designs of Fast Parity-Preserving Reversible Vedic Multiplier
Ehsan PourAliAkbar • Keivan Navi • Majid Haghparast • Midia Reshadi
Keywords: Reversible logic • Reversible array multiplier • Vedic multiplier • parity preserving • quantum computing
Implementation of Efficient Modulo 2n+1 Squarer for {2n-1, 2n, 2n+1} Based Residue Number System
Horialsadat Hossein Sajedi • Keivan Navi • Ali Jalali
Keywords: Modulo Squarer • Multiplier • Residue Arithmetic • Residue Number System
A Reconfigurable, Pipeline Decimal Multiplier
Mahsa Rahmani • Mehdi Sedighi
Keywords: Decimal Multiplication • Pipeline Multiplier • 4221/ 5211 Coding • Lattice Multiplier
Architecture-Level Design Space Exploration for Radix-16 Sequential Multipliers
Saba Amanollahi • Ghassem Jaberipur
Keywords: Sequential Multiplier • Design Space Exploration • Adder Architectures • Energy Efficiency
Efficient Modular Binary Signed-Digit Multiplier for the moduli set {(2^n) -1, 2^n, (2^n) +1}
Maryam Saremi • Somayeh Timarchi
Keywords: Digital Computer Arithmetic • Residue Number System (RNS) • Binary Signed-Digit (BSD) Number Representation • Carry Free Addition • Modular Multiplier
A Modulo (2^n)+1 Multiplier with Faithful Representation of Residues
Ghassem Jaberipur • Hanieh Alavi • Saeed Nejati
Keywords: Modular Multiplier • Residue Number System • Double-Lsb Encoding
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